A solar cell converts solar energy directly to DC electric energy. Generally configured as a photodiode, it permits light to penetrate into the vicinity of metal electrodes (metal contacts) such that a generated charge carrier (electrons or holes (a lack of electrons)) may be extracted as current. And like most other diodes, photodiodes are formed by combining p-type and n-type semiconductors to form a junction.
Electrons on the p-type side of the junction within the electric field (or built-in potential) may then be attracted to the n-type region (usually doped with phosphorous) and repelled from the p-type region (usually doped with boron), whereas holes within the electric field on the n-type side of the junction may then be attracted to the p-type region and repelled from the n-type region. Generally, the n-type region and/or the p-type region can each respectively be comprised of varying levels of relative dopant concentration, often shown as n−, n+, n++, p−, p+, p++, etc. The built-in potential and thus magnitude of electric field generally depend on the level of doping between two adjacent layers.
Most solar cells are generally formed on a silicon substrate doped with a first dopant (commonly boron) forming an absorber region, upon which a second counter dopant (commonly phosphorous) is diffused forming the emitter region, in order to complete the p-n junction. After the addition of passivation, back surface field (BSF), and antireflection coatings, metal electrodes (fingers and busbar on the emitter and pads on the back of the absorber) may be added in order to extract generated charge. The BSF, in particular, must be optimized for both carrier collection and for contact with the metal electrodes.
Referring to FIG. 1, a simplified diagram of a traditional front-contact solar cell is shown. In a common configuration, a phosphorous-doped (n-type) emitter region 108 is first formed on a boron-doped silicon substrate 110 (p-type, although a configuration with a boron-doped emitter region on a phosphorus-doped silicon substrate may also be used.
Prior to the deposition of silicon nitride (SiNx) layer 104 on the front of the silicon substrate, residual surface glass (PSG) formed on the silicon substrate surface during the POCl3 deposition process may be removed by exposing the doped silicon substrate to an etchant, such as hydrofluoric acid (HF). The set of metal electrodes, comprising front-metal electrode 102 and back surface field (BSF)/rear metal contact 116, are then sequentially formed on and subsequently fired into the substrate.
The front metal electrode 102 is commonly formed by depositing an Ag (silver) paste, comprising Ag powder (about 70 to about 80 wt % (weight percent)), glass frit (about 1 to about 10 wt %), and organic components (about 15 to about 30 wt %). After deposition the paste is dried at a tow temperature to remove organic solvents and fired at high temperatures to form the conductive metal layer and to enable the silicon-metal electrode.
BSF/rear metal contact 116 is generally formed from aluminum (in the case of a p-type silicon substrate) and is configured to create a potential barrier that repels and thus minimizes the impact of minority carrier rear surface recombination. In addition, Ag pads [not shown] are generally applied onto BSF/rear metal contract 116 in order to facilitate soldering for interconnection into modules.
However, the use of an aluminum BSF may also be problematic. An aluminum BSF tends to cause solar cell warping, which leads to difficulties in subsequent production processes and decreases the yield due to increased breakage. In addition, not only does an aluminum BSF tend to form a suboptimal reflection surface, reducing the amount of long wavelength light that would otherwise be reflected back into the wafer substrate, but it is also not generally the best form of rear passivation available.
One solution is to replace the aluminum BSF with a more reflective and better passivating layer and to further reduce the rear metal contact area. Consequently, charge carrier recombination at the back surface will tend to be reduced and the absorption of long wavelength light will tend to be increased.
Solar cells configured with this architecture are commonly referred to as PERC (Passivated Emitter and Rear Cell) an architecture that was first introduced in 1989 by the University of New South Wales [A. W. Blakers, et al., Applied Physics Letters, 55 (1989) 1363-1365]. The devices fabricated in that study used heavily doped substrates as well as numerous expensive processing steps that are not compatible with high throughput manufacturing. Other versions of this cell architecture were later introduced as options to further increase the efficiency. Most notable among them is the PERL (passivated emitter rear locally diffused) [A. Wang, et al. J. Appl. Phys. Lett. 57, 602, (1990)] and PERF (passivated emitter rear floating junction) cells [P. P. Altermatt, et al. J. Appl. Phys. 80 (6), September 1996, pp. 3574-3586]. Similar to the original PERC cell, these architectures are expensive to manufacture. Since their introduction there have been numerous attempts to develop an industrially viable approach to make these cells.
One important feature of these cells is the passivation layer on the rear surface. One approach is to use the residual rear phosphorous diffusion, created during the front-side phosphorous diffusion process (or in a separate diffusion step), provided it is disconnected from the front junction. This type of passivation is referred to as a rear diffused floating junction and has been shown to provide excellent quality rear passivation [C. B. Honsberg, Solar Energy Materials and Solar Cells 34, Issues 1-4, 1 Sep. 1994, Pages 117-123]. An alternative type of floating junction can be formed by putting a dielectric layer that contains fixed positive charge (e.g. silicon nitride) onto lightly p-type silicon (i.e. the wafer bulk). In this case the fixed charge creates an inversion layer in the silicon which serves to passivate the silicon surface in a similar way to an n-type diffusion. This case may be referred to as an induced floating junction.
Floating junctions provide excellent rear surface passivation, but are also generally susceptible to the formation of a shunt between the rear metal electrode and the counter-doped areas (floating junction) at the rear of the silicon substrate. This shunt path greatly reduces the passivation provided by the floating junction, resulting in reduced cell efficiency [S. Dauwe, et al, Prog. Photovolt: Res. Appl. 2002; 10:271-278].
Referring now to FIG. 2, a simplified diagram is shown of detrimental shunting in a rear metal reduced area solar cell configuration on a p-type (boron doped) substrate 210 with an n-type emitter layer. Here, a set of front metal electrodes 222 connects to n+ emitter region 220 through front surface SiNx layer 219 in order to make an ohmic contact. n+ emitter region 220 is generally formed with a POCl3 diffusion process. SiNx layer 219 is generally configured to passivate the front surface as well as to minimize hot reflection from the top surface of the solar cell.
Likewise, the set of rear metal electrodes 216 connects with the p− bulk region 210 through back surface SiNx layer 214 in order to make an ohmic contact to the back-side of the cell. However, a residual n+ region 212, created during the POCl3 process to form n+ emitter region 220, creates a shunting pathway for charge carrier 218, which can substantially reduce any generated current as well as the overall solar cell efficiency.